The present invention relates generally to a cross-polarization cancellar. More specifically, the invention relates to a cross-polarization canceller which employs a transversal filter for a multi-level quadrature amplitude modulation system or multi-phase modulation system digital radio communication system.
In the recent digital communication systems, a cross-polarization transmission system has been employed, in which two orthogonally polarized waves, i.e., a horizontally polarized wave (H polarized wave) and a vertically polarized wave (V polarized wave), are used in order to transmit two independent signals at the same frequency so that an available frequency band can be effectively used. When cross-polarization transmission system is adapted to the multivalued quadrature amplitude modulation or the multi-phase modulation, a cross-polarization interference canceller is employed at a receiver side in order to remove a cross-polarization interference due to degradation of cross-polarization discrimination (XPD).
FIG. 6 is a block diagram showing one example of the conventional cross-polarization interference canceller. The shown cross-polarization interference canceller employs a three tap fractional interval type transversal filter for canceling cross-polarization interference by digital signal processing in a base band. The fractional interval type transversal filter is used for the advantage that a compensation characteristics will not be degraded even when a fluctuation of a relative delay time difference is present between the horizontally polarized wave and the vertically polarized wave. For example, such kind of cross-polarization interference canceller has been disclosed in Japanese Patent Application First Provisional Publication JP-A-300729/89.
Brief discussion will be given with respect to the conventional cross-polarization interference canceller employing the fractional interval type transversal filter, with reference to FIG. 6. In the shown prior art, a T/2 interval type transversal filter, which has a tap of an interval of one half of a reproduction clock period T.
In FIG. 6, a modulation wave S1 of an intermediate frequency band of a primary polarized wave (for example, H polarized wave) side, which primary polarized wave is interfered, is input to a terminal 1. A modulation wave S2 of an intermediate frequency band of a different polarized wave (for example, V polarized wave) side, which different polarized wave provides the interference, is input. The primary polarized wave signal S1 and the different polarized wave signal S2 are respectively input to demodulators 11 and 12, respectively. The demodulators 11 and 12 are responsive to those input signals to output base band signals SB1 and SB2 to respective of analog-to-digital converters 15 and 16.
The demodulator 11 reproduces a clock signal CLK1. The clock signal CLK1 is input to the analog-to-digital converter 15. At the same time, the clock signal CLK1 is input to a doubler circuit 18. The doubler circuit 18 doubles the input clock signal CLK1 to output a doubled clock signal CLK2 to the analog-to-digital converter 16. The analog-to-digital converter 15 samples and quantizes the primary polarized wave side base band signal SB1 with the clock signal CLK2 to output a digital signal sequence D1 to a delay circuit 19. Also, the analog-to-digital converter 16 samples and quantizes the different polarized wave side base band signal SB2 with the clock signal CLK2 to output a digital signal sequence D2 to a transversal filter 101.
The transversal filter 101 outputs a compensation signal SX derived by controlling amplitude and phase of the signal from the analog-to-digital converter 16. The compensation signal SX is input to a subtracter 29. The subtracter 29 also receives the output D11 of a delay circuit 19. The subtracter 29 subtracts the output signal of the transversal filter 101 from the output D11 of the delay circuit so as to remove an interference component superimposed on the primary polarized wave signal. The primary polarized wave signal D12, from which the interference component is removed, is output to a terminal 3.
On the other hand, among the primary polarized wave signal D12, an error signal E representative of an deviation of the received signal from a reference value, is supplied to a transversal filter control circuit 102. The transversal filter control circuit 102 correlates the most significant bit D (data polarity signal) of the output D2 of the analog-to-digital converter 16 and the error signal E, and controls a weighting coefficient of each tap of the transversal filter 101 so as to minimize the error signal component. The control algorithm employed is generally called as MZF (Modified Zero Forcing) method. The detail of the MZF method has been discussed in "Digital Signal Processing", The Institute of Electronics, Information, Communication Engineers (IEICE), in Japan, 1975, Section 11.
Next, operation of the transversal filter control circuit 102 will be discussed. The error signal E is indicative of an offset amount of a received multi-level base band signal from the reference value. In case of 2.sup.N valued base band signal, when this signal is analog-to-digital converted, the (N+1)th bit from the most significant bit becomes the error signal E which represents the polarity of the error. Normally, as the error signal, the (N+1)th bit of the signal D12 after compensation of the interference is used to represent a polarity of a residual error component after compensation. On the other hand, as a data polarity signal D, the first bit of the input signal D2 of the transversal filter 101 is used in case of the MZF method. The data polarity signal D is inputted to a delay circuit 30 for compensation of delay in a multiplier 23 and an adder 28 in the transversal filter 101. After adjustment of the timing relative to the error signal E, the data polarity signal D is input to flip-flops 31 and 32 which are connected in series.
With regard to a tap coefficient CO of the multiplier 23 in case of a center tap of the transversal filter, at first, the binary signal CO' is derived as a product of binary values of the error signal E and a signal DO which is the T/2 sec. delayed output D-1 delayed by the delay circuit. Namely, the binary signal CO' is derived by an exclusive OR (EX-OR) circuit 34 to be input to an up/down counter 37. The up/down counter comprises a K stage shift register. The upper M bits of the K-stage shift register as the up/down counter 37 are input to the multiplier 23 as the tap coefficient CO. In the similar way, a tap coefficient C-1 for a -1 tap and a tap coefficient C+1 for a +1 tap are generated. These tap coefficients C-1 and C+1 are input to respective multipliers 22 and 24.
It should be noted that expressing the error signal E and the data polarity signal D at a timing t respectively as E(t) and D(t), the tap coefficient C0(L) of the center tap at a timing t=L can be expressed by the following equation: ##EQU1## where K represents number of stages of the up/down counter
To the multipliers 22, 23 and 24, the output signal D2 of the analog-to-digital converter 16, the signal D3 derived by delaying D2 for T/2 sec, and the signal D4 derived by delaying D3 for T/2 sec are input respectively. A product D2' of D2 and C-1, a product D3' of D3 and C0 and a product D4' of D4 and C+1 are added in an adder 28 and then output to the subtracter 29 as the compensation signal SX. With the foregoing construction, the cross-polarization interference component superimposed in the primary polarized wave side signal can be removed.
In such conventional cross-polarization interference canceller, a tap coefficient averaging circuit of the transversal filter control circuit derives an average by all correlation results E(t).multidot.D1(t) from a time t=1 where canceller initiates operation to the instantaneous timing t=L, it requires substantially long period for averaging. Therefore, when no cross-polarization interference is present, at which the tap coefficient value should be zero, the tap coefficient can be offset from zero when slight offset is contained in the correlation result.
For example, assuming that the number of stages of the up/down counter is K=20, L=10.sup.6, and the rate of the correlation result is "1":"-1"=51:49 (high level is "1" and low level is "-1"), the tap coefficient C0 of the center tap can be expressed by: ##EQU2## Therefore, correct tap coefficient cannot be obtained and rather cause extra interference.